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仰首是春,俯首是秋。2008年翩躚而至,也迎來了茂碩電源的十載耕耘。歲月如歌,春華秋實。我們已走過日新月異、不斷開拓創新的十年,正是在您誠摯的關愛與支持下,我們取得了豐碩的成果。感謝您!
 
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首頁 arrow 電源部落格 arrow Switching-Mode Power Supply Entrainment (4 of 7)

Switching-Mode Power Supply Entrainment (4 of 7)

Personal Anecdote

A group of us started playing with switching-mode power supplies in the early 1960's. One of the engineers with whom I worked, Paul Beihl, who had spend a summer as an engineering student in Austria, found a buck converter described in a German language engineering magazine he subscribed to. Several us started to build breadboards and play with the circuits.

My first design was a buck converter operating at 1 kHz using a Germanium "door knob" 2N174 transistor. About a year later a germanium power transistor became available that would switch at higher frequency. We tried our first production design with hysteretic converters operating at a nominal 12 kHz (yes you could hear them and they annoyed virtually everyone.)

Everything went fine through the breadboard stage and the early prototypes with normal software programs in the computer. Then the test engineers became involved and set up a test to test the core memory. The program switched the memory circuits from a one to a zero and back at the 1 MHz clock frequency and counted down, cutting the loading frequency in half each time until the load switching frequency was 1 Hz and then it counted back up. This loaded the memory power supplies with a zero to maximum load with a frequency sweep that excited anything there was to excite.

That is when we first saw entrainment. Normally when you sweep a load frequency you see an increase in ripple at the point the feedback loop goes through zero gain, but you control this by keeping the characteristic impedance of the output filter, SQRT(L/C), sufficiently low. But this was something else. At certain frequencies, the load would pull the frequency of the converter so that it no longer ran at its natural frequency but entrained with a harmonic, fundamental, or sub-harmonic of the load switching-frequency. When this happened, the ripple amplitude would increase to the point that the protection circuits shut down the computer.

The immediate fix was to go back to running actual programs in the computer while the circuit designers scrambled to find out was going on. We started to test for entrainment and found that autonomous (free running) converters were much more sensitive than those clocked to a fixed frequency. Paul Beihl and his fellow designers changed the design to a fixed frequency PWM which solved the problem for the production design. The solution is in a fixed frequency PWM Voltage Regulator patent which describes the root of the problem. We never again used a free-running converter in a computer, and later, always synched the PWM frequency to the computer clock to minimize beat frequencies and electromagnetic interference. We also tested every new design for entrainment so we knew how susceptible it was.

Later, we also found that you could entrain to noise on the input power lines and to electromagnetic interference. We also found that we sometimes activated chaos in our testing.

Many years later when I was at the Naval Ocean Systems Center I gave a briefing to hundreds of Navy power supply design activities that always included a viewgraph on entrainment. Virtually no power supply designer I talked with was aware of it.

This is in contrast with the users of power supplies in digital systems. At the 2006 Asilomar Microcomputer Workshop I spoke shortly on entrainment. This workshop is by invitation only with the pioneers and leading developers of microprocessors usually in attendance. While speaking, I could see several in the audience nodding their heads in recognition of the problem and several of them shared their experience with me before the workshop was over.

When power supply users are more aware of a problem than the power supply designer, it is time to become aware of the problem and solve it. Make sure your power supply design is immune to entrainment.

Do not use this information for design without independent verification of the information.

Editor: Jerrold Foutz

 
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